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jtmp0360-002s 2000-11-29 1/50 toshiba cmos digital integrated circuit silicon monolithic j t m p 0 3 6 0 - 0 0 2 s lsi for lcd watches 1. summary the jtmp0360-002s is a low-power lsi for watches with chronograph functions. this lsi features a chronograph, lap memory, an alarm function, and a built-in lcd driver. 1.1 feature ? bar graph chronograph and elapsed time displays ? lap memory (max 10 laps) ? lap/split time selectable ? 3.0 v single power supply ? alarm/time signal function ? 12/24-hour display selectable ? toshiba is continually working to improve the quality and reliability of its products. nevertheless, semiconductor devices in g eneral can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. it is the responsibi lity of th e buyer, when utilizing toshiba products, to comply with the standards of safety in making a safe design for the entire system, a nd to avoid situations in which a malfunction or failure of such toshiba products could cause loss of human life, bodily injury o r damage to property. in developing your designs, please ensure that toshiba products are used within specified operating ranges as set forth in th e most recent toshiba products specifications. also, please keep in mind the precautions and conditions set forth in the handlin g guide for semiconductor devices, or toshiba semiconductor reliability handbook etc.. ? the toshiba products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). these toshiba products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfun ction o r failure of which may cause loss of human life or bodily injury (unintended usage). unintended usage include atomic energ y control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion cont rol instruments, medical instruments, all types of safety devices, etc.. unintended usage of toshiba products listed in this docume n t shall be made at the customers own risk. ? the products described in this document are subject to the foreign exchange and foreign trade laws. ? the information contained herein is presented only as a guide for the applications of our products. no responsibility is assume d b y toshiba corporation for any infringements of intellectual property or other rights of the third parties which may result from i ts use. no license is granted by implication or otherwise under any intellectual property or other rights of toshiba corporation o r others. ? the information contained herein is subject to change without notice. 000707 eba1
jtmp0360-002s 2000-11-29 2/50 1.2 block diagram * 1: anti-chattering circuit * 2: noise canceller com1~com8 timer select segment buffer buzzer controller seg1~seg20 bz display ram data ram row column t x y nc * 2 doubler halver timming generator (tg) back up 100 ms stop watch io21~io24 lap regestar ot4 ot2 ot1 io2 ion1 acc * 1 ca pc rom io11~io14 in21~in22 in11~in14 v dd1 v dd2 v dd3 v ddc fai1 fai2 500 ms 125 ms 31.25 m a/s a s c in carry ad ot3 system control signal instruction decoder (id) c- cnt v ss v dd1 v dd2 fai1~fai4 test2 r in r out xi xo ac test1 display timing generator
jtmp0360-002s 2000-11-29 3/50 1.3 pin description (60 pins) pin name symbol no. of pins power supply pin v dd1 , v dd2 , v dd3 , v ddc , v ss , vreg 6 oscillator pin xi, xo, r out , r in 4 input pin in11~14, in21, in22, ac 7 output pin bz 1 display pin com1~8, seg1~20 28 input/output pin io11~14, io21~24 8 test pin test1, test2 2 voltage doubler/halver pin fai1~4 4 1.4 description of functions pin name function xi, xo r out , r in connects low-speed clock oscillator crystal in11~in14 in21, in22 6-bit input pin. when input to the accumulator, only four bits can be read simultaneously. io11~io14 io21~io24 input/output ports with output latch bz mainly for buzzer, alarm, and time signal output fai1~fai4 for 0.1 f voltage doubler/halver capacitor connection vreg ? test1, test2 for testing (by toshiba) at shipping. fix to low. ac for system setting v ss v dd1 v dd2 v dd3 v ddc 0 v (gnd) connects to v ss via 0.1 f capacitor (1.5 v at voltage step-down) 3 v connects to v ss via 0.1 f capacitor (3.0 v at voltage step-down) connects to v ss via 0.1 f capacitor seg1~20 outputs segment signals com1~8 outputs common signals
jtmp0360-002s 2000-11-29 4/50 1.5 pad layout in11 seg10 v ddc seg9 seg8 seg7 seg6 seg5 seg4 seg3 seg2 seg1 com1 com2 com3 com4 r out seg11 com5 com6 com7 com8 seg20 seg19 seg18 seg17 seg16 seg15 seg14 seg13 seg12 r in in12 in13 in14 in21 in22 xi xo ac test1 test2 fai3 fai4 v dd3 vreg io11 v ss bz v dd1 v dd2 fai1 fai2 io24 io23 io22 io21 io14 io13 io12 origin (0, 0) chip size: 3.52 3.33 (mm) chip thickness: 440 30 ( m) top view
jtmp0360-002s 2000-11-29 5/50 1.6 pad location table ( m) in11 ( 168, 2784) io11 ( 3270, 435) in12 ( 168, 2624) io12 ( 3270, 595) in13 ( 168, 2439) io13 ( 3270, 755) in14 ( 168, 2279) io14 ( 3270, 915) in21 ( 168, 2119) io21 ( 3270, 1075) in22 ( 168, 1959) io22 ( 3270, 1235) xi ( 168, 1799) io23 ( 3270, 1395) xo ( 168, 1639) io24 ( 3270, 1555) ac ( 168, 1479) fai2 ( 3270, 1715) test1 ( 168, 1319) fai1 ( 3270, 1875) test2 ( 168, 1159) v dd2 ( 3270, 2035) fai3 ( 168, 966) v dd1 ( 3270, 2195) fai4 ( 168, 806) bz ( 3270, 2355) v dd3 ( 168, 646) v ss ( 3270, 2515) r in ( 168, 403) vreg ( 3270, 2784) r out ( 444, 168) v ddc ( 2873, 3015) com5 ( 654, 168) com4 ( 2713, 3015) com6 ( 864, 168) com3 ( 2528, 3015) com7 ( 1074, 168) com2 ( 2368, 3015) com8 ( 1283, 168) com1 ( 2183, 3015) seg20 ( 1443, 168) seg1 ( 2023, 3015) seg19 ( 1603, 168) seg2 ( 1851, 3015) seg18 ( 1763, 168) seg3 ( 1691, 3015) seg17 ( 1923, 168) seg4 ( 1531, 3015) seg16 ( 2083, 168) seg5 ( 1371, 3015) seg15 ( 2243, 168) seg6 ( 1211, 3015) seg14 ( 2403, 168) seg7 ( 1051, 3015) seg13 ( 2563, 168) seg8 ( 891, 3015) seg12 ( 2723, 168) seg9 ( 731, 3015) seg11 ( 2883, 168) seg10 ( 571, 3015)
jtmp0360-002s 2000-11-29 6/50 2. function specifications 2.1 display configuration and segment symbols com1 com2 com3 com4 com5 com6 com7 com8 seg1 alm chm #16-b #16-c #7-b #7-c #14-b #14-c seg2 #16-a #16-g #16-h #7-a #7-g #14-a #14-g #14-d seg3 #16-f #16-e #16-d #7-f #7-e #7-d #14-f #14-e seg4 #15-a #15-b #15-c #6-b #6-c #13-b #13-c seg5 #15-h #15-g #15-i #6-a #6-g #13-a #13-g #13-d seg6 #15-f #15-e #15-d #6-f #6-e #6-d #13-f #13-e seg7 best bar-5 bar-4 bar-3 bar-2 bar-1 ? ? seg8 split bar-11 bar-12 bar-13 bar-14 ? ? ? seg9 lap bar-10 bar-9 bar-8 bar-7 bar-6 ? ? seg10 recall ? ? ? ? ? ? ? seg11 sec1 #5-b #5-g #5-c sec2 #12-b #12-g #12-c seg12 #5-a #5-f #5-e #5-d #12-a #12-f #12-e #12-d seg13 #4-b #4-g #4-c #4-d #11-b #11-g #11-c #11-d seg14 #4-a #4-f bar #4-e #11-a #11-f col3 #11-e seg15 min1 #3-b #3-g #3-c min2 #10-b #10-g #10-c seg16 #3-a #3-f #3-e #3-d #10-a #10-f #10-e #10-d seg17 #2-b #2-g #2-c #2-d #9-b #9-g #9-c #9-d seg18 #2-a #2-f col1 #2-e #9-a #9-f col2 #9-e seg19 ? #1-a #1-b #1-g #1-c #8-b #8-g #8-c seg20 ? #1-f #1-e #1-d #8-a #8-f #8-e #8-d min1 min2 recall lap best split bar -6 #2 bar-10 col3 col1 col2 #8 #1 #3 #4 #6 #5 #7 #9 #10 #11 sec2 #12 #13 #14 bar sec1 bar -7 bar -9 bar -8 bar -11 bar -12 bar -14 bar -13 bar -1 bar -2 bar -3 bar -4 bar -5 #15 #16 h f e i d c a b g f e d c g a b h alm chm
jtmp0360-002s 2000-11-29 7/50 2.2 lcd connection diagram note: the figures in the display are common numbers. segment common 5 6 7 7 6 8 8 5 6 8 6 5 7 8 5 6 7 7 6 8 8 5 6 8 6 5 7 8 1 2 3 3 2 4 4 1 2 4 2 1 3 4 1 2 3 3 2 4 4 7 7 7 3 3 recall 1 lap 1 best 1 split 1 6 5 4 3 2 2 3 4 5 6 5 4 3 2 1 2 1 1 1 2 3 3 3 3 3 3 2 4 2 1 1 2 2 7 2 3 2 4 4 3 5 5 6 7 7 8 5 6 8 1 5 5 1 1 4 4 5 5 4 5 6 4 4 5 5 5 6 6 6 7 8 6 7 7 8 6 7 7 7 8 8 8 1 2 4 2 1 3 4 3 seg10 seg9 seg8 seg7 seg6 seg5 seg4 seg3 seg2 seg1 com1 com2 com3 com4 com5 com6 com7 com8 seg20 seg19 seg18 seg17 seg16 seg15 seg14 seg13 seg12 seg11
jtmp0360-002s 2000-11-29 8/50 2.3 liquid crystal display
jtmp0360-002s 2000-11-29 9/50 2.4 liquid crystal drive wave forms v dd3 com1 v dd2 v dd1 v ss v dd3 com3 v dd2 v dd1 v ss v dd3 com2 v dd2 v dd1 v ss v dd3 com4 v dd2 v dd1 v ss v dd3 com5 v dd2 v dd1 v ss v dd3 com6 v dd2 v dd1 v ss v dd3 com7 v dd2 v dd1 v ss v dd3 com8 v dd2 v dd1 v ss v dd3 seg v dd2 v dd1 v ss 1 frame 1 frame 15.6 ms 1.95 ms
jtmp0360-002s 2000-11-29 10/50 2.5 display 2.5.1 time mode display alm chm 2 0 10 20 30 40 50 1 11 21 31 41 51 12 22 32 42 52 3 13 23 33 43 53 4 14 24 34 44 54 5 15 25 35 45 55 6 16 26 36 46 56 7 17 27 37 47 57 8 18 28 38 48 58 9 19 29 39 49 59
jtmp0360-002s 2000-11-29 11/50 2.5.2 chrono mode display 0.2 0.0 1.0 2.0 3.0 4.0 0.1 1.1 2.1 3.1 4.1 1.2 2.2 3.2 4.2 0.3 1.3 2.3 3.3 4.3 0.4 1.4 2.4 3.4 4.4 0.5 1.5 2.5 3.5 4.5 0.6 1.6 2.6 3.6 4.6 0.7 1.7 2.7 3.7 4.7 0.8 1.8 2.8 3.8 4.8 0.9 1.9 2.9 3.9 4.9 alm chm lap
jtmp0360-002s 2000-11-29 12/50 5.2 5.0 6.0 7.0 8.0 9.0 5.1 6.1 7.1 8.1 9.1 6.2 7.2 8.2 9.2 5.3 6.3 7.3 8.3 9.3 5.4 6.4 7.4 8.4 9.4 5.5 6.5 7.5 8.5 9.5 5.6 6.6 7.6 8.6 9.6 5.7 6.7 7.7 8.7 9.7 5.8 6.8 7.8 8.8 9.8 5.9 6.9 7.9 8.9 9.9
jtmp0360-002s 2000-11-29 13/50 2.5.3 memory recall mode display 2.5.4 alarm mode display (1) alarm display (2) time signal display alm chm recall lap alm chm alm chm
jtmp0360-002s 2000-11-29 14/50 2.6 mode transition diagram note: for s 1 , s 2 , s 3 and s 4 , see the corresponding example circuit. time mode time setting mode run1 run lap1 run2 split1 run lap2 run3 split2 run start/stop start/stop lap/reset split/reset best lap2 total2 lap10 total10 lap stop total split2 total split10 total split stop total lap1 total1 split1 total chrono mode memory recall mode alarm time signal alarm mode alm off chm off alm on chm on alm on chm off alm off chm on alarm setting mode 12/24 h s 2 time-of-day s 2 s 3 s 1 s 2 s 3 s 1 s 2 s 3 s 1 s 2 s 3 s 1 s 3 s 1 s 4 (2 s hold) s 3 s 4 s 2 s 2 s 2 s 2 s 4 s 4 00 s 1 s 1 s 4 s 4 s 2 s 1 s 2 s 1 s 2 s 1 s 2 s 1 s 2 s 1 s 2 s 1 s 1 s 1 s 1 s 1 s 4 s 4 s 1 s 1 s 2 s 2 s 1 s 2 s 4 s 4 s 3 s 3 s 2 s 3 s 3 s 1 s 1 s 2 s 2 * 1: when lap or split are set to stop, s 4 is enabled. in the run state, s 4 is disabled. switching between lap and split resets lap or split and the data stored in memory recall mode. second minute day of month hour month day of week chrono (lap) chrono (split) time minute s 2 s 1 s 2 s 1 * s 4 (2 s hold) s 3 chrono (lap) chrono (split) s 2 s 3 s 2 minute
jtmp0360-002s 2000-11-29 15/50 2.7 mode description 2.7.1 time mode time mode is used to display the current time and make time settings. ? middle row columns #2 and #3 display the month, columns #4 and #5 display the day of the month with unnecessary zeros suppressed. ? upper row columns #15 and #16 display the day of the week. ? lower row column #8 displays am/pm. ? lower row columns #9 and #10 display the hour, columns #11 and #12 display minutes, and #13 and #14 display seconds. ? the on/off states of the time signal and alarm are displayed in the upper right corner. ? when the alarm or time signal is set, the alarm or time signal sign in the top row flashes. when the lap or split functions are running in chrono mode, the lap or split signs flash. ? pressing multiple switches simultaneously invalidates the switches pressed. ? pressing a second switch while still pressing the first invalidates both switches. ? s 2 can be used to switch between a 12-and 24-hour clock. such switching can only be performed in time mode. (a) 12-hour clock (b) 24-hour clock alm chm alm chm
jtmp0360-002s 2000-11-29 16/50 2.7.2 time setting mode ? access time setting mode by pressing s 4 for two seconds in time mode. ? pressing s 3 in time setting mode displays in turn the seconds, the minutes, the hour, the month, the day of the month, the day of the week, then the seconds again. set each while it is flashing. ? in time setting mode, the alm/chm signs turn off and the sound is disabled even if they were set on before entering time setting mode. when returning from time setting mode to time mode, the alm/chm sign returns to the status before the switch to time setting mode. ? in time setting mode, pressing s 4 switches to time mode. s 4 can be pressed from the second, minute, month, day of the month, or day of the week displays. ? if any switch is not pressed for one minute in time setting mode, the device automatically switches to time mode. ? pressing multiple switches simultaneously invalidates the switches pressed. ? pressing a second switch while still pressing the first invalidates both switches. (a) setting the seconds ? pressing s 2 swich seconds display is 0-29, the seconds are simply set to ?00?. if the seconds display is 30-59, the seconds are simply set to ?00? and one minute is incremented. *: s 1 is invalid (b) setting the minutes ? use s 1 or s 2 to set the minutes. each press of s 1 increments the time by one minute. pressing s 2 decrements the time by one minute. pressing either s 1 or s 2 for two seconds fast-winds the time at a speed of 4 hz for as long as the switch is depressed. pressing another switch during the fast winding immediately cancels the fast winding. to return to fast winding, press s 1 or s 2 as above after releasing all other switches. ? the count range is 0~59.
jtmp0360-002s 2000-11-29 17/50 (c) setting the hour ? use s 1 and s 2 to set the hour as in ?setting the minutes?. displays the range: for 12-hour clock am12~11 pm12~11 for 24-hour clock 0~23 (d) setting the month ? use s 1 or s 2 to set the month as in ?setting the minutes?. displays the range: 1~12
jtmp0360-002s 2000-11-29 18/50 (e) setting the day of the month ? use s 1 and s 2 to set the day of the month as in ?setting the minutes?. for january, march, may, july, august, october, and december, the range displayed is: 1~31 for april, june, september, and november, the range displayed is: 1~30 for february, the range displayed is: 1~29 (f) setting the day of the week ? use s 1 or s 2 to correct the month as in ?correcting the minutes?. displays the range: su~sa * : time setting mode can display some days of the month that do not actually exist (february 30, february 31, april 31, june 31, september 31, november 31). when switching from time setting mode to time mode, the first day of the following month is displayed. (example) february 30 in time setting mode, s 4 becomes march 1 in time mode.
jtmp0360-002s 2000-11-29 19/50 2.7.3 chrono mode chrono mode displays lap and split time. ? middle and lower row columns #1 and #8 display the hour; columns #2 and #3, and #9 and #10 display the minutes ; columns #4 and #5, and #11 and #12 display the seconds; columns #6 and #13 display tenths of seconds ; and columns #7 and #14 display hundredths of seconds. ? the middle row displays lap and split time. ? upper row columns #15 and #16 display the lap or split count number. ? the lower row displays the run time. ? clocking is up to 9 hours, 59 minutes, 59 seconds, 99 hundredths of seconds. ? in the run state, after 9 hours and 59 minutes, 59 seconds, and 99 hundredths of seconds, the count-up returns to 0, but because of zero suppression, the counting starts from display of a single zero. ? displays the alm/chm on/off status. ? in chrono mode, a switch-push sound is generated when s 1 or s 2 are pressed. in the case of s 4 , the sound is generated after s 4 is held for two seconds. ? to switch between lap and split, depress s 4 for two seconds. this resets the lap or split display. (switching is indicated by the switch-push sound. lap/split switching also resets the data stored in memory recall mode. during the run state, s 4 is invalid and cannot be used for switching. ? the lap/split count number starts from 01. when 99 is reached, the count returns to 00. this cycle is repeated indefinitely. ? after an all clear in chrono mode, the lap mode reset state is displayed. ? if other switches are pressed at the same time as s 1 , s 1 takes precedence. ? pressing switches other than s 1 at the same time invalidates the switches pressed. ? pressing a second switch while still pressing the first, unless the first switch is s 1 , invalidates both switches. (1) lap mode display (a) reset state ? in lap mode, after a reset and in a state other than run, the display is as at left. ? the lap sign at the top of the display is lit. alm chm lap
jtmp0360-002s 2000-11-29 20/50 (b) run 1 state lap 0 ? pressing s 1 sets the watch to run. the run state is displayed (zero suppressed) in the lower row. the graphic display in the upper row functions at the same time. ? as long as lap time is not recorded, the middle row display is blank. * : once a digit is displayed in this column, the digit will not be zero suppressed. however, pressing s 2 (lap) resets and zero suppresses the lower row. (c) run 2 state lap 1 ? in lap 0, run 1 state, pressing s 2 displays the lap time in the middle row, and the lap number at the far right of the upper row. also, pressing s 2 in lap 0, run 1 state resets the time display in the lower row and starts the count from 0. ? if lap time is measured when no other lap time is recorded, the lap time recorded is the ?best lap? time, and the best lap function is activated. if another lap time is recorded, it is compared to the current best time. if the lap time is shorter than the current best lap time, the best lap function is activated. if the lap time is longer than the current best lap time, the best lap function is not activated. if the lap time is the same as the current best lap time, the lap time recorded first remains the best lap time. therefore, where same lap times are recorded, the best lap function is not activated. * : best lap function the best lap is the fastest lap. when a best lap time occurs, the best sign in the top row flashes at 2 hz, and the best time sound is output. while the best lap time remains displayed in the middle row, the best sign in the top row continues flashing. alm chm lap alm chm lap best
jtmp0360-002s 2000-11-29 21/50 (d) run 3 state lap 2 ? compares the best lap time with the current lap. because the current lap time is longer, the best sign is not lit. (e) run 3 stop state ? pressing s1 stops the run state. ? even if the time to when the count stops is shorter than the best time, that time is ignored because it is not a full lap time. * : even if the count is stopped with the best sign still flashing, the best sign continues to flash. if the count is restarted, the best sign continues flashing because the best lap time is displayed in the middle row. * : during best time sound output (during run state) ? if the count is stopped by pressing s 1 , the s 1 switch-push sound takes precedence. if the best time sound is on, it stops immediately. ? if the lap is recorded using s 2 , the s 2 switch-push sound takes precedence. if the best time sound is on, it stops immediately. ? if the lap is recorded using s 2 and that lap time is a best time, the s 2 switch-push sound takes precedence. if the best time sound is on, it stops immediately, then starts again after the s 2 switch-push sound ends. ? if the mode is switched using s 3 , the switch-push sound is not output. however, the best time sound stops immediately and the device switches to memory recall mode. ? except for pressing s 4 and s 1 together, pressing more than one switch at the same time invalidates both switches. therefore, the best time sound continues. alm chm lap alm chm lap
jtmp0360-002s 2000-11-29 22/50 (2) split mode display (a) reset state ? executing a reset in split mode produces the display shown at left. (b) run state split 0 ? pressing s 1 sets the device to run and displays the run count in the lower row. the upper row graphic display comes on at the same time. (the lower row run count display is zero suppressed.) (c) run state split 1 ? pressing s 2 in run split 0 state displays the time elapsed as split time in the middle row, and displays the split number at the right end of the upper row. alm chm split alm chm split alm chm split
jtmp0360-002s 2000-11-29 23/50 (d) run state split 2 ? split 2 functions the same as run split 1. pressing s 2 updates the time displayed in the middle row with the time elapsed from start, which becomes the new split time, and displays the split number at the right end of the upper row. (e) run stop state ? pressing s 1 stops the run count. ? pressing s 2 after stopping the run count displays the reset state. * : the run time displayed in the lower row in split mode is not reset when split data is recorded. once a digit is displayed in this column the digit will not be zero suppressed. alm chm split alm chm split
jtmp0360-002s 2000-11-29 24/50 2.7.4 memory recall mode memory recall mode stores and displays the lap or split data recorded in chrono mode. ? middle and lower row columns #1 and #8 display the hour; columns #2 and #3, and #9 and #10 display the minutes; columns #4 and #5, and #11 and #12 display the seconds; columns #6 and #13 display tenths of seconds; and columns #7 and #14 display hundredths of seconds. upper row columns #15 and #16 display the lap or split number. ? the upper row displays the lap or split numbers. the middle row displays the data of the lap or split numbers. the lower row display varies according to which of split or lap data is displayed. for lap time, the lower row shows the time elapsed from the start time to the lap number, in accordance with the lap number at that time. for split time, the lower row shows the total time elapsed irrespective of the split number. ? this mode does not support a graphic display. ? up to 10 units of data in addition to time data can be stored and displayed. ? memory recall mode cannot include both lap data and split data. either lap or split data is displayed immediately before switching out of chrono mode. memory recall mode can include one but not both. ? in chrono mode, performing lap/split switching by depressing s 4 for two seconds clears the memory recall data. if lap is selected for chrono mode, the lap sign is displayed in memory recall mode and lap data is displayed. if split is selected for chrono mode, the split sign is displayed in memory recall mode and split data is displayed. ? if 10 or fewer units of data are recorded, all the data and stop times are displayed continuously. if over 10 units of data are recorded, only the latest ten units of data are stored and older data is deleted. ? the lap/split numbers start from 01 and continue to 99. after 99, the count returns to 00, 01, 02 up to 99 again, then repeats. ? after switching from memory recall mode with lap or split data displayed to another mode, then returning to memory recall mode, memory recall mode displays the lap or split data from the lowest number, regardless of the number at the time the previous mode was switched. (as long as you did not start in chrono mode or did not switch between lap and split after leaving memory recall mode.) ? memory recall mode simultaneously displays the on/off status of both alm/chm (alarm and chime). ? pressing multiple switches simultaneously invalidates the switches pressed. ? pressing a second switch while still pressing the first invalidates both switches.
jtmp0360-002s 2000-11-29 25/50 (1) lap mode (a) lap n ? after lap data is recorded in chrono mode, switching to memory recall mode displays the data in the middle row starting from the lowest lap number. ? the lower row displays the total time from the start to the applicable lap number. ? where a best lap is stored in memory, the best sign is lit while the data of that lap is displayed. (b) lap n + 1 ? pressing s 1 displays the next lap data. pressing s 2 displays the previous lap data. ? for the applicable lap number, the lower row displays the total time from the start. alm chm recall lap best alm chm recall lap
jtmp0360-002s 2000-11-29 26/50 (c) lap stop ? the data at the point the count was stopped is displayed in the middle row. the lower row displays the total time from start to stop. the upper row shows ? ? ? ? as at left. (d) best lap ? whatever data is displayed in memory recall mode, while s 4 is depressed, the best lap time is displayed. (if another switch is pressed while s 4 is depressed, the display returns to the lap or stop data displayed before switching to the best lap time display. ? when s 4 is released, the display returns to the lap or stop data displayed before switching to the best lap time display. ? in the best lap time display, the lap number appears in the upper row. the best lap time is displayed in the middle row, as at left. ? the best time is the fastest time among all the lap times recorded. where a lap number n (100 < n) is the same as the best time number n (100 > n), the best sign is not lit even though lap number n, which is not the best time, is displayed. best alm chm recall lap alm chm recall lap
jtmp0360-002s 2000-11-29 27/50 ? when s 3 is pressed with lap mode only selected in chrono mode, the display is as at left when memory recall mode is entered. the best lap time is as in figure 2. * : when an all clear is executed and reset memory recall mode is executed (when switching from split to lap in chrono mode), the display is as in figure 1. recall lap best figure 2 recall lap figure 1
jtmp0360-002s 2000-11-29 28/50 ? when recording lap n in lap mode and pressing s 3 with the count running to switch into memory recall mode, the data up to lap n is displayed. (lap 1 < lap 2) (memory recall mode display) lap 1 start lap 2 switching to memory recall mode a b s 1 s 2 s 1 display chm alm a a best lap recall display chm alm b a b + lap recall s 2
jtmp0360-002s 2000-11-29 29/50 ? in chrono mode, if you start a lap n, record, then stop and restart, the count starts from the stop time. the data following lap n + 1 continues from the stop time. (the counting from the previous stop time continues until a reset.) * : lap 1 < lap 2 < example > (memory recall mode display when start lap 1 stop.) (memory recall mode display when start lap 1 stop restart lap 2 stop.) restart stop lap 2 stop lap 1 start b a c d s 1 s 2 s 1 chm alm a a best lap recall chm alm b a b + lap recall s 2 s 1 s 2 s 1 s 2 chm alm a a best lap recall chm alm a b + lap recall chm alm d a b + lap recall c d + + b c + c + s 2 s 1
jtmp0360-002s 2000-11-29 30/50 (2) split mode display (a) split n ? when entering memory mode after recording split data in chrono mode, data is displayed in the middle row starting from the lowest split number. ? the lower row displays the total time, irrespective of the split number. (b) split n + 1 ? each press of s 1 displays the next split data. each press of s 2 displays the previous split data. ? the lower row displays the final (at stop) total time. (c) split stop ? as the middle row displays the data for when the count was last stopped, this is the same data as in the lower row. the upper row shows ? ? ? ? as at left. alm chm recall split alm chm recall split alm chm recall split
jtmp0360-002s 2000-11-29 31/50 ? with only the split mode activated in chrono mode, pressing s 3 to enter memory recall mode produces a display as below. resetting memory recall mode (switching from lap to split) also produces a display as below. ? when recording split n in split mode and pressing s 3 with the count running to switch into memory recall mode, the data up to split n is displayed. < example > (display in memory recall mode) recall split split 1 start switch to memory recall mode a b split 2 s 1 s 2 s 1 < split 1 > display chm alm a spilt recall < split 2> display chm alm a b + recall s 2 a b + a b + spilt
jtmp0360-002s 2000-11-29 32/50 ? in chrono mode, if you start a split n count, record, then stop and restart, the count from the stop time. the data following split n + 1 continues from the stop time. (the data continues until a reset.) < example > (memory recall mode display when start split 1 stop.) (memory recall mode display when start split 1 stop restart split 2 stop.) restart stop split 2 stop split 1 start b a c d s 1 s 2 s 1 chm alm a split recall chm alm a b + recall s 2 split a b + a b + s 1 s 2 s 1 s 2 chm alm a split recall chm alm a b + recall chm alm a b + recall c d + + c + split split a b + c d + + a b + c d + + a b + c d + + s 2 s 1
jtmp0360-002s 2000-11-29 33/50 2.7.5 alarm mode alarm mode is used to set and display the alarm and time signal. ? in this mode, the graphic display and upper row columns #15 and #16 go off. ? in memory recall mode, press s 3 to switch to alarm mode. ? the alarm and time signal on/off states are displayed by the upper right sign. (lit: on, unlit: off) ? in alarm mode, each press of s 1 turns the alarm on, time signal off alarm off, time signal on alarm/time signal on alarm/time signal off alarm on, time signal off... ? in alarm mode, depressing s 1 for two seconds sounds a test alarm. while s 1 is depressed, the alarm continues sounding. (when the alarm is sounding, pressing another switch turns the alarm sound off. if the test alarm is sounding when the preset alarm or time signal are due to come on, the test alarm tone takes precedence and the set alarm or time signal chime do not sound.) ? if the settings for the alarm and time signal are for the same time, the alarm takes precedence. ? the alarm mode does not allow 12-hour/24-hour clock switching. (such switching is supported only in time mode.) the 12-hour and 24-hour clocks conform to time mode. ? press s 2 to switch between the alarm and time signal displays. ? after all clear, the alarm display shows ?am12:00? if the 12-hour clock is selected, and ?0:00? if the 24-hour clock is selected. after the all clear, the time signal display shows ?00?. ? pressing multiple switches simultaneously invalidates the switches pressed. ? pressing a second switch while still pressing the first invalidates both switches.
jtmp0360-002s 2000-11-29 34/50 alarm/time signal (a) alarm display ? the middle row displays ?al?. the bottom row displays the set time-of-day. ? press s 2 to switch between the alarm and time signal. (b) time signal display ? the middle row displays ?ch?. the bottom row displays the set minutes of the hour. alm chm alm chm
jtmp0360-002s 2000-11-29 35/50 2.7.6 alarm setting mode ? press s 4 while the alarm or time signal is displayed to switch to alarm setting mode for the alarm or time signal. ? if a switch is not pressed for one minute while in alarm setting mode, the device automatically switches to alarm mode. ? when switching to alarm setting mode from alarm mode, even if the alarm/time signal are set, the alm or chm sign goes off and the alarm and chime (time signal) sounds are disabled. ? in alarm setting mode, press s 4 to switch to alarm mode. when switching to alarm mode from alarm setting mode, the alarm is set and the alm sign is lit. the chm sign returns to the status prevailing before switching to alarm setting mode. when switching to alarm mode from alarm setting mode for the time signal, the time signal is set and the chm sign is lit. the alm sign returns to the status prevailing before switching to alarm setting mode. ? the method of correcting the alarm hour and minutes, and the method of correcting the time signal minutes is the same as for correcting the hour and minutes in time setting mode. press s 3 to switch between the alarm hours and minutes to be set. ? pressing multiple switches simultaneously invalidates the switches pressed. ? pressing a second switch while still pressing the first invalidates both switches. 2.7.7 alarm functions ? with the alm sign lit, when the current time matches the set alarm time, the alarm sounds for 20 seconds. ? in alarm setting mode, even if the set alarm time matches the current time, the alarm will not sound. ? to stop the alarm sound in any mode except alarm setting mode, press any one of switches s 1 ~s 4 . ? if the alarm sound comes on while you are depressing a switch in any mode except setting mode, release the switch then press it again to stop the alarm sounding. ? while switching from time mode to time setting mode by depressing s 4 for two seconds (in time mode), the alarm will sound if the set alarm time matches the current time. however, keep s 4 depressed. as soon as the mode is switched, the alarm sound and the alm sign go off.
jtmp0360-002s 2000-11-29 36/50 2.7.8 all clear after an all clear, time mode is selected. the count starts from january 1 (sunday) am12 hours, 0 minutes, 0 seconds. after an all clear, the display is as below. 2.7.9 all segments lit immediately after an all clear, press s 4 (until the display comes on) to light all segments (the display is as below). then, to switch from all segments being lit to time mode, push any one of s 1 ~s 4 . * : after an all clear, time mode starts counting. therefore, when you return to time mode, the time count has advanced. timing flow chart acr s 4 disp 1 s all lit alm chm recall lap best split
jtmp0360-002s 2000-11-29 37/50 2.7.10 alarm waveform

2.8 all clear function when power is applied or when the supply of power is interrupted (e.g. if the battery is changed), the internal state of the ic may become unstable, even though it appears to be operating normally. for this reason it is vital to verify that the crystal oscillation circuit is oscillating normally and stably (at 32 khz) and then to use the system reset pin to initialize the ic (i.e. clear it) before use. note that a clear operation using the built-in power-on clear circuit should not be used in this case. refer to ?5. handling precautions? for details of all clear function. 0.0625 (s) 4 khz 0.0625 (s) 0.0625 (s) 0.0625 (s) 0.0625 (s) 4 khz 0.5 (s) 4 khz 0.5 (s) 1 (s) 0.0625 (s) 4 khz 0.5 (s) 1 (s) 20 0.0625 (s) 0.0625 (s) 0.0625 (s) 0.0625 (s) 0.0625 (s) 0.0625 (s) 0.0625 (s)
jtmp0360-002s 2000-11-29 38/50 3. electrical specifications maximum ratings (unless otherwise specified, v ss = = = = 0 v, v dd1 = = = = 1.5 v, v dd2 = = = = 3.0 v, v dd3 = = = = 4.5 v, ta = = = = 25c) no. characteristics symbol rating unit 1 power supply voltage (1) v ss ? v dd1 ? 0.2~ + 3.0 v 2 power supply voltage (2) v ss ? v dd2 ? 0.2~ + 5.0 v 3 power supply voltage (3) v ss ? v dd3 ? 0.2~ + 6.5 v 4 v dd1 system input voltage v in1 v ss ? 0.2~v dd1 + 0.2 v 5 v dd2 system input voltage v in2 v ss ? 0.2~v dd2 + 0.2 v 6 v dd3 system input voltage v in3 v ss ? 0.2~v dd3 + 0.2 v 7 v dd1 system output withstanding voltage v out1 v ss ? 0.2~v dd1 + 0.2 v 8 v dd2 system output withstanding voltage v out2 v ss ? 0.2~v dd2 + 0.2 v 9 v dd3 system output withstanding voltage v out3 v ss ? 0.2~v dd3 + 0.2 v 10 operating temperature range t opr ? 10~ + 60 c 11 storage temperature range t stg ? 40~ + 125 c recommended operating conditions (unless otherwise specified, v ss = = = = 0 v, v dd1 = = = = 1.5 v, v dd2 = = = = 3.0 v, v dd3 = = = = 4.5 v, ta = = = = 25c) characteristics symbol test circuit test condition min typ. max unit test diagram (note) v dd1 system operating voltage range ? v dd1 ? v dd1 no load 1.20 1.50 1.80 v ? ? v dd2 system operating voltage range ? v dd2 ? v dd2 no load 2.40 3.00 3.60 v 3.6 1 v dd3 system operating voltage range ? v dd3 ? v dd3 no load 3.60 4.50 5.40 v ? ? low-speed clock crystal oscillator frequency fxt x in , x out v dd = 3.0 v ? 32.768 ? khz 3.1 ? high-speed clock cr oscillator frequency fcr r in , r out v dd = 3.0 v r = 100 k ? ? 400 ? khz 3.1 ?
jtmp0360-002s 2000-11-29 39/50 dc characteristics (unless otherwise specified, v ss = = = = 0 v, v dd1 = = = = 1.5 v, v dd2 = = = = 3.0 v, v dd3 = = = = 4.5 v, ta = = = = 25c) characteristics symbol applic -able pin test circuit test condition min typ. max unit test diagram (note) v dd1 system leak current idd1l v dd1 ? ? ? ? 1.0 a 3.4 ? v dd2 system leak current idd2l v dd2 ? ? ? ? 1.0 a 3.4 ? v dd3 system leak current idd3l v dd3 ? ? ? ? 1.0 a 3.4 ? v dd1 system step-down voltage vdco1 v dd1 ? r l = 3 m ? 1.4 ? ? v 3.5 ? v dd3 system step-up voltage vuco3 v dd3 ? r l = 3 m ? 4.3 ? ? v 3.5 ? oscillation start voltage vsta x in , x out ? ? 2.6 ? ? v 3.3 5 oscillation hold voltage vhold x in , x out ? ? 2.4 ? ? v 3.3 ? cr oscillator voltage dependency v cr r in , r out ? v dd2 = 2.4~3.6 v ? 30 ? 30 % 3.3 ? low oscillation frequency vth dependency ? i c x in , x out ? ? ? ? 8 ppm 3.3 8 low oscillation frequency v dd2 dependency ? v dd2 x in , x out ? v dd2 = 2.4~3.6 v ? ? 4 ppm 3.3 7, 9 low oscillation frequency c g dependency ? c g x in , x out ? c g = 5~20 pf ? 20 ? ppm 3.3 6, 9 oscillator output resistance routx x in , x out ? ? ? 250 ? k ? ? ? built-in cd capacitance cd x in , x out ? ? ? 20 ? pf ? 9 dc characteristics (current dissipation) cpu block (v dd ? ? ? ? v ss system) characteristics symbol applic -able pin test circuit test condition min typ. max unit test diagram (note) high-speed operation mode current dissipation idd (oph) ? ? v dd = 3.0 v fcr = 400 khz ? 100 200 a 3.1 2 low-speed operation mode current dissipation idd (opl) ? ? v dd = 3.0 v fxt = 32.768 khz ? 2.5 4.0 a 3.1 3 stop mode current dissipation idd (stop) ? ? v dd = 3.0 v fxt = 32.768 khz ? 1.0 2.0 a 3.1 4
jtmp0360-002s 2000-11-29 40/50 dc characteristics (pin capacity) (unless otherwise specified, v ss = = = = 0 v, v dd1 = = = = 1.5 v, v dd2 = = = = 3.0 v, v dd3 = = = = 4.5 v, ta = = = = 25c) characteristics symbol applicable pin test circuit test condition min typ. max unit test diagram (note) output current h i oh1 out, io ? v dd2 = 2.5 v v oh1 = 2.0 v ? ? ? 250 a 3.2 ? output current l i ol1 out, io ? v dd2 = 2.5 v v ol1 = 0.5 v 10 ? 90 a 3.2 ? output current h i oh2 bz/dc1 ? v dd2 = 2.5 v v oh2 = 2.0 v ? ? ? 250 a 3.2 ? output current l i ol2 bz/dc1 ? v dd2 = 2.5 v v ol2 = 0.5 v 250 ? ? a 3.2 ? output current h i oh3 seg, com ? for v ss ? v dd3 v oh3 = 4.0 v ? ? ? 80 a 3.2 ? output current l i ol3 seg, com ? for v ss ? v dd3 v ol3 = 0.5 v 80 ? ? a 3.2 ? output current h i oh4 seg, com ? for v ss ? v dd1 v oh4 = 1.0 v ? ? ? 80 a 3.2 ? output current l i ol4 seg, com ? for v ss ? v dd1 v ol4 = 2.0 v 80 ? ? a 3.2 ? output current h i oh5 seg, com ? for v ss ? v dd2 v oh5 = 2.5 v ? ? ? 80 a 3.2 ? output current l i ol5 seg, com ? for v ss ? v dd2 v ol5 = 3.5 v 80 ? ? a 3.2 ? input current h i ih1 ac ? v ih1 = 3.0 v 30 50 75 a 3.2 ? input current l i il1 ac ? v il1 = 0 v ? 1.0 ? 1.0 a 3.2 ? input current h i ih2 test1, test2 in1, in2 ? v ih2 = 3.0 v 30 50 75 a 3.2 ? input current l i il2 test1, test2 in1, in2 ? v il2 = 0 v ? 1.0 ? 1.0 a 3.2 ?
jtmp0360-002s 2000-11-29 41/50 note1: the voltage range where the oscillation and step-up voltage are held and the internal circuits operate correctly. note2: the current consumed in high-speed mode after all clear. note3: the current consumed in low-speed mode set by the [fxt] instruction after all clear. note4: the current consumed in off mode set by the [stop] instruction after all clear. note5: the value of the v ss2 voltage when a stepped voltage is applied to v ss2 and less than 10 seconds is required until a normal waveform is output to 1 output. note6: ? c g is calculated by the following equation. note that t 0 = 1000 ms. t (c g = 20 pf) ? t (c g = 5 pf) ? c g = t 0 10 6 [ppm] note7: ? v dd2 is calculated by the following equation. t (v dd2 = 3.6 v) ? t (v dd2 = 2.4 v) ? v dd2 = ? t 0 ? 10 6 [ppm] note8: when the mean value t of the periodic anomaly of a 100% sample and the typical anomaly, ()() 1 n t ti 2 ? ? = / ? i c = 3 note9: this is a guaranteed design value. the characteristics are checked by an initial sample.
jtmp0360-002s 2000-11-29 42/50 test circuits 100 k ? test pin r in r out xout xin x tal c g 15 pf v ss v dd1 v dd2 v dd3 v ih , v il v oh , v ol a figure 3.2 measurement of input/output current fai1 100 k ? fai2 fai3 fai4 r in r out xout xin xtal c g 15 pf v ss v dd2 v dd1 v dd3 v ddc c 1 ~c 5 = 0.1 f xtal rs < = 30 k ? a c 4 c 5 c 3 c 2 c 1 figure 3.1 measurement of current dissipation and osicillation frequency
jtmp0360-002s 2000-11-29 43/50 figure 3.3 measurement of vsta and vhold fai1 100 k ? fai2 fai3 fai4 r in r out xout xin xtal c g 15 pf v ss v dd2 v dd1 v dd3 v ddc c 1 ~c 5 = 0.1 f xtal c i < = 30 k ? c 4 c 5 c 3 c 2 c 1 monitor figure 3.4 v dd1 , v dd2 and v dd3 leakage currents 100 k ? r in r out xin v ss v dd1 v dd2 v dd3 during testing, stop the pg at the gnd level. a a a pg
jtmp0360-002s 2000-11-29 44/50 100 k ? r in r out xout xin xtal c g 15 pf v ss v dd1 v dd2 v dd3 function checker figure 3.6 measurement of v dd1 , v dd2 and v dd3 operating voltage ranges fai1 100 k ? fai2 fai3 fai4 r in r out xout xin xtal c g 15 pf v ss v ddc v dd2 v dd1 v dd3 c 1 ~c 5 = 0.1 f xtal r s < = 30 k ? r l = 5 m ? the input impedance of th e voltmeter must be at leas t 1,000 m ? c 4 c 5 c 3 c 2 c 1 vuco3 v v r l r l vdco1 figure 3.5 measurement of vdco, vuco
jtmp0360-002s 2000-11-29 45/50 4. application circuit xtal segment common lcd xo xi r in r out fai1 fai2 fai3 fai4 ac seg1~seg20 jtmp0360-002s 0.1 f 0.1 f 0.1 f com1~com8 v ddc 0.1 f v dd1 0.1 f v dd3 v ss v dd2 0.1 f 3.0 v in21 in22 in13 in14 s 1 s 2 s 3 s 4 bz 32.768 khz 100 k ?
jtmp0360-002s 2000-11-29 46/50 5. handling precautions described below are precautions for handling the device. 5.1 reset by ac pin when the power supply voltage is within the operating voltage and the crystal oscillator is operating, holding the ac pin at high for 2 ms or longer initializes the internal lsi (figure 5.1). when the ac pin level goes to low, reset is released, starting execution of the program. the ac pin is internally pulled down. a switch can configure a simple reset circuit. note that the ac pin incorporates a noise canceller; thus, to assure reset, the ac pin must be held high for at least 2 ms (figure 5.2). when the crystal oscillator is not operating normally, for example, at power on, the noise canceller does not operate. as a result, the level is not read from the ac pin. while the ac pin is held high, backup is performed to start operation of the crystal oscillator. the ac pin must be held high for 3 seconds until the crystal oscillator operates normally (figures 5.3 and 5.4). if oscillation does not start after the above operation, an off instruction may be executed. in such a case, inputting high to one of the in11 to in14 pins while holding the ac pin at high releases the off instruction and starts oscillation. note1: at power on or power cutoff, operation of the internal ic is unstable. an all-clear is required. note2: to check that the all-clear is complete, confirm that the ic is in initial state, for example, by checking the lcd display. note3: during backup, the power supply voltage (v dd2 ) is directly applied to the crystal oscillator. thus, current dissipation (60 (a typ.) during backup increases more than usual. 5.2 reset by simultaneous high input to sw pins (in21, 22, 13, 14) simultaneously inputting high to the sw (in21, 22, 13, 14) pins for at least two seconds performs a reset. however, because a noise canceller is incorporated to prevent erroneous resets, resets are valid when the crystal oscillator is operating normally (figures 5.5 and 5.6). backup is performed while a reset signal input to the sw pins via the noise canceller resets the internal system. the power supply voltage (v dd2 ) is directly applied to the oscillator. thus, current dissipation (60 (a typ.) during backup increases more than usual (figure 5.4). backup is released approximately two seconds after a reset by the sw pins is released. the current value returns to normal.
jtmp0360-002s 2000-11-29 47/50 the all-clear timing by ac pin and all-clear circuit are shown below. figure 5.2 all-clear circuit *: p synchronizes with the rising edge. ac 1 k ? 30 pf min: 35.3 k ? acr d q1 p * r sr d q2 p * r sr 1 khz noise canceller figure 5.1 all-clear timing chart ac 1 khz q1 acr 3 v 0 v reset at least 2 ms are required here to assure reset.
jtmp0360-002s 2000-11-29 48/50 below is a timing chart for backup. ac pin internal reset signal acr internal reset signal acr2 v ddc * 3 v 1.5 v 3 v 0 v counter block reset cpu block reset 8 ms (2 ms) ac pin level reading backup 2 s internal system rese t release and program started crystal oscillator starts oscillation (3 s) * : oscillator power supply monitor terminal figure 5.3 backup timing chart
jtmp0360-002s 2000-11-29 49/50 below is a circuit diagram for the backup circuit. figure 5.4 backup circuit * 3 : p synchronizes with the rising edge. ac 1 k ? 30 pf min: 35.3 k ? acr d q1 p * 3 r sr d q2 p * 3 r sr noise canceller d p d 1 khz noise canceller in14 in13 in22 in21 * 1 * 1 1 hz 1 hz 1.5/3.0 v switching circuit crystal oscillator keyreset swacr q p q s s r r n * 2p * 2 bc sr d q q * 2 : n synchronizes with the falling edge. p synchronizes with the rising edge. * 1 : anti-chattering circuit buzzer
jtmp0360-002s 2000-11-29 50/50 below are a timing chart for the all-clear and a circuit diagram for the all-clear circuit using simultaneous pressing of the switches. at least 2 ms are required here to assure reset. keyreset 2 hz bcr q sr q swacr 1 hz figure 5.5 sw all-clear timing chart noise canceller in14 in13 in22 in21 * 1 * 1 1 hz keyreset swacr r r n * p * bc sr d q q *: n synchronizes with a falling edge. p synchronizes with a rising edge. * 1 : anti-chattering circuit figure 5.6 sw all-clear circuit

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